gr.diag(8) — Kubota Pacfic Computer Inc. (October 15, 1988)
NAME
gr.diag − Test the graphics main and graphics expansion boards
DESCRIPTION
This diagnostic tests for the proper functioning of the graphics and the graphics expansion board (if present).
DETAILS
Details of each test are specified with each menu and submenu selection.
BOARDS THAT MUST BE INSTALLED
This test requires at least one CPU board, one memory board, a graphics main board, a graphics expansion board and a known good I/O board for downloading the test. Note that to run this test, the system keyboard must be disconnected and a DCP console must be installed.
SPECIAL COMMAND LINE PARAMETERS
None
MENU ITEMS SPECIFIC TO THIS TEST
The following menu items, specific to the test, are provided. Note that the main menu has many many submenu items. The descriptions of the tests are indented appropriately to denote submenus. The illustration here shows how the main menu is presented. Note that the ’∗∗∗’ following a main menu selection indicates that there is a submenu that is presented when this menu item is selected.
MAIN MENU
| 0. | q | Quit. | 9. | zo | Z_Op Tests | ∗∗∗ | |
| 1. | l= | Loop times. | 10. | bl | Block Tests | ∗∗∗ | |
| 2. | v= | Verbose level (0-2). | 11. | in | Interrupt Tests | ∗∗∗ | |
| 3. | er= | Max errors to report. | 12. | vm | VMUX Tests | ∗∗∗ | |
| 4. | hoe= | Halt-On-Error. | 13. | cs | Exerciser/Checksum | ||
| 5. | rs | Regs/SRAMs/Brooktree | ∗∗∗ | 14. | vb | Visual Base Bd | |
| 6. | rr | Rasterizer Reg Tests | ∗∗∗ | 15. | vx | Visual Exp Bd | |
| 7. | vr | VRAM Tests | ∗∗∗ | 16. | pp | Peek & Poke | |
| 8. | po | Pixel_Op Tests | ∗∗∗ | 17. | all | All Tests. | |
The paragraphs that follow are indented to indicate their presence on the:
•Main Menu (Item is listed as a primary heading)
•First Submenu (Item is listed as a subheading to the main menu item)
•Second Level Submenu (Indent of approximately 5 spaces from the left hand margin)
rs (Submenu)
Registers/SRAMs/Brooktree − this selection brings up the following submenu.
| reg | This selection brings up the register test submenu | |
| _ | _ | |
| r1 | Test the LED register | |
| r2 | Test the Board ID Register | |
| r3 | Test the Video Control Register | |
| r4 | Test the Wr DMA Word Count Register | |
| r5 | Test the Wr DMA Start Address Register | |
| r6 | Test the Rd DMA Word Count Register | |
| r7 | Test the Rd DMA Start Address Register | |
| r8 | Test the Interrupt Enable Register | |
| r9 | Test the first address of the video timing memory | |
| ra | Test the first address of address translation memory | |
| rb | Test the first address of the color map | |
| rc | Test any address | |
| rd | Write data into A register | |
| all | Perform all register tests in this submenu | |
| _ | _ | |
| sr | This selection brings up the SRAM test submenu | |
| _ | _ | |
| m1 | Test the Video Timing Memory | |
| m2 | Test the Address Translation Memory | |
| m3 | Test the Color Table Memory | |
| m4 | Test arbitrary locations within the SRAM | |
| all | Perform all SRAM tests in this submenu | |
| _ | _ | |
| rd | This selection brings up the RAMDAC test submenu | |
| _ | _ | |
| rd | Test the RED register | |
| gr | Test the Green register | |
| bl | Test the Blue register | |
| ps | Test the Pseudo Color register | |
| rgb | Test the ability to do RGB colors in parallel | |
| all | Perform all RAMDAC tests in this submenu | |
| _ | _ | |
rr (Submenu)
This selection brings up the following submenu.
| reg | This selection begins the test on all of the rasterizer registers |
| ras | This selection tests the various rasterizer selection mode |
| all | This selection runs the ras and reg tests above. |
vr (Submenu)
This selection brings up the following VRAM test submenu.
| p8s | The Pixel_8 selection brings up the following submenu | |
| _ | _ | |
| rr | Test Red/Red (Red rasterizer, red plane) | |
| rg | Test Red/Green (Red rasterizer, green plane) | |
| rb | Test Red/Blue (Red rasterizer, blue plane) | |
| oc | Test Overlay/Control plane | |
| zb | Test the Z-buffer plane | |
| gf | Test the Green front plane | |
| gb | Test the Green back plane | |
| bf | Test the Blue front plane | |
| bb | Test the Blue back plane | |
| _ | _ | |
| pss | Pixel_S Write/Read Subtest brings up the following menu | |
| _ | _ | |
| rr | Test Red/Red (Red rasterizer, red plane) | |
| rg | Test Red/Green (Red rasterizer, green plane) | |
| rb | Test Red/Blue (Red rasterizer, blue plane) | |
| fr | Test the front plane | |
| bk | Test the rear plane | |
| _ | _ | |
| pts | Point Write/Read Subtest brings up the following menu | |
| _ | _ | |
| rr | Test Red/Red (Red rasterizer, red plane) | |
| rg | Test Red/Green (Red rasterizer, green plane) | |
| rb | Test Red/Blue (Red rasterizer, blue plane) | |
| oc | Test Overlay/Control plane | |
| zb | Test the Z-buffer plane | |
| gf | Test the Green front plane | |
| gb | Test the Green back plane | |
| bf | Test the Blue front plane | |
| bb | Test the Blue back plane | |
| _ | _ | |
| p8 | Test all of VRAM with Pixel8 Write/Read test |
| ps | Test all of VRAM with Pixel_S Write/Read test |
| pt | Test all of VRAM with Point Write/Read test |
| all | Perform all of the above VRAM tests |
po (Submenu)
This selection brings up the Pixel_Op menu as follows
| rec | Foreground Register test. Check that the foreground registers can hold all possible values. |
| pat | Area Pattern test. Check that the area pattern registers can hold all possible values. |
| fun | Pixel function test. Verify that each of the possible pixel functions can be executed. |
| clp | Clip test. |
| img | Image Write mask. Verify the correct operation of the image write mask. |
| clr | Clear Mode. Verify the correct operation of clear mode for the rasterizers. |
| vec | Vector (H/V). Verify correct operation of vector generation hardware. |
| org | Origin (X&Y). Verify that writing to the origin registers resets the onscreen position of the upper lefthand corner of the screen display. |
| all | All Pixel_Ops. This test selection performs all pixel ops shown in this menu. |
zo (Submenu)
This selection brings up the following Z_Op test submenu.
| mm | Z-deep test. Test the Z-buffer functions. |
| pl | Plane test. ??? |
| bit | Bit test. ??? |
| all | All. Runs all Z_Op tests in this menu. |
bo (Submenu)
This selection brings up the Block test submenu as follows.
| rd | Move a block of pixels around the sides of the screen. |
| ct | Move a block of pixels to the center of the screen. |
| pan | Move a block of pixels across the diagonal of the screen. |
| rds | Same as rd except is a scope loop |
| cts | Same as ct except is a scope loop |
| pas | Same as pan except is a scope loop |
| all | Runs rd, ct and pan. |
in (Submenu)
This selection brings up an interrupt test submenu as shown below. The purpose of this set of tests is to verify that various operations do indeed cause an interrupt to the central processor.
| i1 | DMA Error |
| i2 | Multiple RAS Error (occurs when a read to multiple Rastersizers is requested - only one is allowed to write to the bus at a time.) |
| i3 | Rasterizer Sync Error |
| i4 | Color Table Load Complete |
| i5 | Color Table Error |
| i6 | VBLANK Interrupt |
| i7 | Video SRAM Error |
| i8 | DMA All Done Interrupt |
| i9 | DMA Read Interrupt |
| ia | DMA Write Interrupt |
| all | Runs all interrupt tests |
cs (Submenu)
| bas | Base Board Triangle - uses the triangle drawing hardware to render a triangle to the rasterizer memory, then checks that the appropriate bits have been set in the rasterizer memory. |
| exp | Base Board and Expansion Board triangle - uses the triangle drawing hardware on both the base and expansion boards to render a colored triangle to the rasterizer memory and then checks that the appropriate bits have been set in the rasterizer memory. |
| all | Runs both the bas and the exp tests. |
vb (Submenu)
This selection brings up a submenu that provides visual feedback regarding the proper operation of the graphics base board.
| ba | Base board tests. Includes the following: ??? |
| ha | Halt tests. Verifies that it is possible to halt a graphics board DMA operation in progress (at a command boundary), then resume with the rest of the queued DMA commands with expected results. |
| nt | NTSC Tests. Checks that the system will correctly output to an NTSC monitor. |
| pt | PAL Tests. Checks that the system will correctly output to a PAL monitor. |
| st | Stereo Tests. Checks that the system will correctly output for and synchronize to a set of stereo glasses. |
| all | Runs all of the above expansion board visual tests. |
vm (Submenu)
This selection brings up the following VMUX (Video multiplexor) test submenu.
| all | Runs the VMUX tests |
vx (Submenu)
This selection brings up a submenu that provides visual feedback regarding the proper operation of the graphics expansion board.
| ex | Expansion board tests. Includes the following: ??? |
| ha | Halt tests. Includes the following kinds of tests: ??? |
| nt | NTSC Tests. Checks that the system will correctly output to an NTSC monitor. |
| pt | PAL Tests. Checks that the system will correctly output to a PAL monitor. |
| all | Runs all of the above expansion board visual tests. |
pp (Submenu)
This selection brings up the Peek and Poke submenu as follows. This allows the technician to manually operate the graphics hardware.
| in | Initialize SRAMs. This is usually the first test performed when this submenu is selected. |
| dp | Dump. Dumps the contents of various memory and registers on the graphics board according the following menu. |
| _ | |
| sp Select pseudo RAMDAC | |
| sr Select red RAMDAC | |
| sg Select green RAMDAC | |
| sb Select blue RAMDAC | |
| d1 Dump RAMDAC Color Table | |
| d2 Dump RAMDAC Overlay Table | |
| d3 Dump Video Timing SRAM | |
| d4 Dump Address Translation RAM | |
| d5 Dump Full Color SRAM | |
| d6 Dump Pseudo Color SRAM | |
| d7 Dump Write DMA Buffer | |
| d8 Dump Read DMA Buffer | |
| d9 Dump VRAM (Point Read) | |
| _ | |
| rwr | Rasterizer Register Write/Read. |
| rr | Rasterizer Register Read. |
| rl | Rasterizer Register Scope Loop. |
| pw | Point Write/Read. |
| pr | Point Read. |
| ps | Point Scope Loop. |
| rec | Draw Rectangle. |
| p8l | Pixel8/16 Scope Loop. |
INTERPRETING THE ERROR CODES
The following errors may be generated by this test. (The actual error wording may differ, however the type of error is as summarized here.)
100This error message is printed when an error occurs during block move tests on the rasterizers. The failing rasterizer is identified by name. Additional messages that accompany this one identify the move direction for the block, the source and destination values, and the failing address for the block move, showing actual and expected values.
102This error message is printed when an error occurs during a block move in a diagonal direction (panning a block diagonally). The same kind of supplemental information is printed as for error 101.
104,106
A graphics interrupt has been generated, and the CPU has been directed to wait for a given period of time before it should respond to the interrupt. At the end of this interval, the CPU checked that the interrupt actually occured and it did not.
108A graphics interrupt occured and the CPU tried to clear the graphics board Status register by clearing the appropriate bit in the Interrupt Enable register. The Status Register did not clear as expected.
110A graphics interrupt occured and the CPU tried to clear the graphics board Status register by clearing the appropriate bit in the Interrupt Clear register. The Status Register did not clear as expected.
112Following the generation of a graphics interrupt, the graphic Status register did not contain the expected value. Both the actual and expected value are reported.
114Data for a specific operating mode (normal, NTSC, PAL etc) has been copied into the video SRAM, intended to switch the video into this particular mode. This error indicates that the data read was not the same as the data written and therefore the video SRAM will not necessarily display what is expected. This indicates there is something wrong with the Video SRAM memory or its selection logic.
116,118
This error occurs when there has been a timeout while waiting for the Write DMA or Read DMA to complete. The Write and Read DMA control register contents, as well as the DMA address contents for write or read DMA are also reported.
120RAMDAC CMD register contents not as expected following initialization for a specific operating mode (normal, NTSC, PAL, etc.). This message also reports the failing register and the actual and expected data.
122RAMDAC MASK register contents not as expected following initialization for a specific operating mode.
124RAMDAC BLINK register contents not as expected following initialization for a specific operating mode.
126RAMDAC CNTRL register contents not as expected following initialization for a specific operating mode.
128When the diagnostic tried to set the value of one of the color registers in the SRAM, the color value read was not the same as that written. This is a memory error associated with the SRAM.
130The diagnostic was comparing the data in the SRAM to the data that was written into the RAMDAC internal color table memory and found a miscompare. This could indicate a problem in the RAMDAC memory, or in the DMA circuitry that transfers data from the SRAM to the RAMDAC.
132Following a Pixel_8 or point write, the contents of the video RAM are compared to that which was expected to be written to the various bit planes. Any discrepancies are reported as actual and expected values, along with the failing address. This could indicate a failure in the VRAM chips or their access circuitry.
134
This function handles error report for VRAM tests in the following
cases:
dx=10,dy=1024, (xadrs,yadrs) starting every 4 pixel/byte, or
dx=1280,dy=8, (xadrs,yadrs) starting every 4 pixel/byte, or
dx=10,dy=1024, (xadrs,yadrs) starting every 2 pixel/halfword,or
dx=1280,dy=8, (xadrs,yadrs) starting every 2 pixel/halfword.
(1) x location of pixel that failed.
(2) y location of pixel that failed.
(3) Act data versus Exp data in byte.
(4) Use Xor indicate failing bit(s) in 8, 16, 32, 64 bit address.
(5) Read retry to see failure on read or write.
(6) Find out which chip(s) failed.
136Error during the interactive point write test. The user has already
entered the X and Y addresses and the data to be written. The system
reports the data that it read following a write. The data read did
not match the data the user tried to write.
138Error during the interactive point read test. The user has already
entered the X and Y addresses and the data that the user believes is
at that location. The system reports the data that it read
does not match what the user though was located at that position.
140When doing either an Area pattern Inhibit/Enable Test or an
Area pattern Background/Foreground test, the actual value read back
after a write did not match the value that was written.
The failing rasterizer number, along with the X and Y address,
the actual and expected values are reported.
142Various rasterizer modes were set, and either a horizontal or
a vertical vector is drawn. The test that generates this error
checks the vector to see if it is drawn correctly. The error reported
is "vector is neither H or V".
144
146,148,150,152Brooktree RAMDAC registers are being tested. The data read back from
a register in a specified RAMDAC is not as written. The failing RAMDAC
and the failing address, along with the actual and expected value are
reported.
156The Graphics card ID register contents was checked and found that it
does not contain the expected value. Actual and expected value are
reported.
158,160,162,164The ability of each rasterizer to correctly write its corresponding
bit planes is verified. If the Red Rasterizer has an error, error
158 is reported. Errors 160, 162 and 164 are for the Z, Green, and
Blue rasterizers respectively.
166,168,170,172The graphics board is capable of queuing up several sets of graphics
DMA commands, each of which has an explicit starting point consisting
of a header word and count, along with the data that describes the
command. A halt test is being performed which consists of telling
the graphics board to come to a stop at the next command boundary
(following the current graphics DMA operation). The address of the
next command in sequence is saved so that another operation may be
done to the graphics, then is restored to allow the queued operations
to be finished. These errors indicate that the graphics halt test
did not work as expected in that the expected data did not compare
to the actual data read from the video memory. Error 166 is associated
with the Red Rasterizer; errors 168, 170, and 172 are associated with
the Z, Green and Blue rasterizers respectively.
174,176,178,180,182The tests that are running here check the integrity of the data path
from the video ram, through the video multiplexors and the color
tables within the RAMDACs. Basically, known values are placed into
the frame buffer and the color tables, and the video RAMs are placed into
static mode (not run at normal video speeds) so that the color that is
stored into the frame buffer can be passed through the color table and
the "translated" value for that color can be checked. Several different
patterns and operating modes are checked, with and without overlays
used, and in both full color and pseudocolor mode, assuring that all
color tables and all data paths are checked.
The type of test that was being performed at the time of the error
is indicated with this error message.
194The Z-buffer was being tested and the image data was not as expected.
Reports the actual and expected values, along with the failing address.
196The Z-buffer was being tested, and the Z-buffer memory did not contain
the value that was written at a particular position. Both the actual
and the expected values are reported, as well as the failing address.
197During several of the diagnostics, the system occasionally checks
to see that various registers contain the expected value. This error
is reported when the actual and expected values don’t match. The
error is normally preceded by a report of which test was being performed
and may provide more clues as to exactly which circuitry is not
functioning correctly. Actual and expected value, along with the
failing register address is reported.
198The graphics attribute portion of the SRAM was being loaded and the
value written did not match the value that was read after this SRAM
was initialized.
200This diagnostic forces deliberate errors to be registered into the
graphics board S Bus Status Register and checks that the system
responds correctly to these errors happening. The deliberate errors
are NXA (non existent address), DPE (data parity error), RPE
(requestor parity error) and BTO (bus time out). If any of these
error responses is incorrect, the type of test, the actual and
expected contents of the status register is reported.
This error is generated when the graphics board is acting
as an initiator.
201A known pattern is written to the video SRAM through the normal
rectangle area fill functions. The checksum of the patterned area
is calculated and errors are individually reported for each of the
bit planes involved in generating the pattern. This tests the
rectangle fill function, the area pattern register, and the
video SRAM on the base board.
202This error value reports a failure of the graphics board to force
a "boot error" operation when writing into the appropriate bit of
the graphics board S Bus Status Register.
203This is the same as error 201 except that it reports problems on
the graphics expansion board instead of the base board.
204This error is reported if a forced error does not occur while the
graphics board is acting as a responder.
206Graphics test was unable to locate a memory board that it could
use during other tests. (No memory board responded when queried).
208The graphics diagnostic deliberately generated an interrupt but the
interrupt did not occur.
210,212An attempt was made to generate an exception condition using the
graphics S Bus Status register but the exception did not get
registered by the CPU.
214An unexpected graphics board status value or an unexpected graphics
interrupt has occurred. The contents of various registers is dumped
For examination. These include CPU SBUS status register, the
Graphics board S Bus Status register, the MIPS (Integer Processor)
Cause register, the MIPS EPC register, the MIPS SR register, and
the MIPS BADVADDR register.
September 02, 1992