NAME

grex1.diag − Exception tests for graphics boards, part 1

DESCRIPTION

This test exercises various bits in the graphics board S Bus Status register to assure that setting various bits in the graphics board S Bus register will cause the proper interrupt to be generated to the CPU board. 

DETAILS

In the system, all boards are supposed to be capable of detecting certain kinds of exception conditions and when they detect them, they should cause the processor to be interrupted.   This test checks that the graphics board exception response circuitry is operational, but does not deliberately generate any of the exception conditions -- instead it simply sets the appropriate error bits directly and checks to see that the appropriate interrupt will occur. 

BOARDS THAT MUST BE INSTALLED

This test needs a CPU board, at least one memory board, a graphics board, and a known good I/O board for downloading the test. 

SPECIAL COMMAND LINE PARAMETERS

None

MENU ITEMS SPECIFIC TO THIS TEST

rtResponder test - this test also writes to the graphics board S Bus Status register to cause an interrupt.   The difference from the initiator test is that during this test, the graphics board is identified as the “culprit”, in other words, the CPU is told that the graphics board sensed (and perhaps in some way caused) the problem.  The test then checks to assure that the CPU has properly identified that it is indeed the graphics board who flagged the problem. 

itInitiator test - performs a memory bit test on various bits in the graphics board S Bus Status register (checks that the bit that we set or clear is the bit -- and the ONLY bit -- that is affected and that it is set to the proper state).  Then the test checks to see that setting this bit causes the expected kind of interrupt (and no other). 

INTERPRETING THE ERROR CODES

The following errors may be generated by this test.  (The actual error wording may differ, however the type of error is as summarized here.) 

200This error is generated if the test finds that it cannot set (or clear) a specified bit in the graphics board S Bus Status register.  The expected and actual values are reported, as well as the explicit bit that was being checked. 

202Writing the S Bus status register during the initiator test should have caused a boot error interrupt.  But this did not occur.  (Boot error happens when a particular board in the system identifies an error by setting one of its error bits, but no board steps up to say that it was the one that caused the problem.) 

204An interrupt did not occur when a specific bit in the graphics S Bus Status register was set during the responder test. 

September 02, 1992