NAME

iotimer.diag − test the timer on the I/O board

DESCRIPTION

As the title describes

DETAILS

None

BOARDS THAT MUST BE INSTALLED

This test requires a CPU board, a memory board and the I/O board. 

SPECIAL COMMAND LINE PARAMETERS

None

MENU ITEMS SPECIFIC TO THIS TEST

clClock test - check that the time of day clock is functioning

tiTimer test - check that the countdown timer is functioning

cwClock Write Test - check that it is possible to set the clock and that the setting is correctly reflected in the current clock time. 

INTERPRETING THE ERROR CODES

The following errors may be generated by this test.  (The actual error wording may differ, however the type of error is as summarized here.) 

101The system has looped 100 times, reading the timer each time.  Because The clock chip updates many times slower than the system clock, this test expects that it should be able to read the same time value several passes in succession.  If this error occurs, it means that the clock chip is putting out random values and the system is "unable to read the same time twice". 

103If this error occurs, it indicates that the time of day clock is not running.  The error report says "TODC appears to be stuck". 

105This test writes the year value to the clock chip.  If this error occurs, when the test read the year value, the value was not as expected. 

107This test writes the seconds, tens of seconds, minutes, hours and month values to the clock chip, then checks that the correct values have been stored.  If th is error happens, the clock chip had an incorrect value.  All values are reported so that the value in error may be determined. 

111This test checks that the timer high latch and timer low latch can be written and that the value read back is the same as the value written.  This test primarily checks that the data can get to the timer. 

115This test checks accessibility of 6 data registers in the timer chip.  If this error occurs, the actual and expected values and the address that yielded incorrect results are reported. 

117This test checks that the countdown timer number 1 is functioning.  If this error happens, timer number 1 in the clock/timer chip may be bad. 

119This test checks that countdown timer number 3 is counting in catenated mode.  If this error happens, timer number 3 in the clock/timer chip may be bad. 

121This test checks that countdown timer number 2 is counting in catenated mode.  If this error happens, timer number 2 in the clock/timer chip may be bad. 

123If this error occurs, it means that the timer has counted down, but the timer interrupt bit in the clock/timer interrupt register did not get set. 

September 02, 1992